1. Field of the Invention
The present invention relates to an amorphous carbon film, its use in integrated circuit fabrication, and a method for depositing the film.
2. Description of the Background Art
Integrated circuits have evolved into complex devices that can include millions of transistors, capacitors and resistors on a single chip. The evolution of chip designs continually requires faster circuitry and greater circuit density. The demands for faster circuits with greater circuit densities impose corresponding demands on the materials used to fabricate such integrated circuits. In particular, as the dimensions of integrated circuit components are reduced (e.g., sub-micron dimensions), it has been necessary to use low resistivity conductive materials (e.g., copper) as well as low dielectric constant insulating materials (dielectric constant less than about 4.5) to improve the electrical performance of such components.
The demands for greater integrated circuit densities also impose demands on the process sequences used for integrated circuit manufacture. For example, in process sequences using conventional lithographic techniques, a layer of energy sensitive resist is formed over a stack of material layers on a substrate. An image of a pattern is introduced into the energy sensitive resist layer. Thereafter, the pattern introduced into the energy sensitive resist layer is transferred into one or more layers of the material stack formed on the substrate using the layer of energy sensitive resist as a mask. The pattern introduced into the energy sensitive resist can be transferred into one or more layers of the material stack using a chemical etchant. The chemical etchant is designed to have a greater etch selectivity for the material layers of the stack than for the energy sensitive resist. That is, the chemical etchant etches the one or more layers of the material stack at a much faster rate than it etches the energy sensitive resist. The faster etch rate for the one or more material layers of the stack typically prevents the energy sensitive resist material from being consumed prior to completion of the pattern transfer.
However, demands for greater circuit densities on integrated circuits have necessitated smaller pattern dimensions (e.g., sub-micron dimensions). As the pattern dimensions are reduced, the thickness of the energy sensitive resist must correspondingly be reduced in order to control pattern resolution. Such thinner resist layers (less than about 6000 Å) can be insufficient to mask underlying material layers during a pattern transfer step using a chemical etchant.
An intermediate oxide layer (e.g., silicon dioxide, silicon nitride), called a hardmask, is often used between the energy sensitive resist layer and the underlying material layers to facilitate pattern transfer into the underlying material layers. However, some material structures (e.g., damascene) include silicon dioxide and/or silicon nitride layers. Such material structures cannot be patterned using a silicon dioxide or silicon nitride hardmask as an etch mask.
Resist patterning problems are further compounded when lithographic imaging tools having deep ultraviolet (DUV) imaging wavelengths (e.g., less than about 250 nanometers (nm)) are used to generate the resist patterns. The DUV imaging wavelengths improve resist pattern resolution because diffraction effects are reduced at these shorter wavelengths. However, the increased reflective nature of many underlying materials (e.g., polysilicon and metal silicides) at such DUV wavelengths, can degrade the resulting resist patterns.
One technique proposed to minimize reflections from an underlying material layer uses an anti-reflective coating (ARC). The ARC is formed over the reflective material layer prior to resist patterning. The ARC suppresses the reflections off the underlying material layer during resist imaging, providing accurate pattern replication in the layer of energy sensitive resist.
A number of ARC materials have been suggested for use in combination with energy sensitive resists. For example, U.S. Pat. No. 5,626,967 issued May 6, 1997 to Pramanick et al. describes the use of titanium nitride anti-reflective coatings. However, titanium nitride is increasingly metallic as the exposure wavelength is reduced below 248 nm, meaning titanium nitride has high reflectivity for DUV radiation and is not an effective anti-reflective coating for DUV wavelengths.
U.S. Pat. No. 5,710,067 issued Jan. 20, 1998 to Foote et al. discloses the use of silicon oxynitride anti-reflective films. Silicon oxynitride films are difficult to remove, in that they leave residues behind that potentially interfere with subsequent integrated circuit fabrication steps.
Therefore, a need exists in the art for a material layer useful for integrated circuit fabrication, which has good etch selectivity with oxides. Particularly desirable would be a material layer that is also an ARC at DUV wavelengths and is easy to strip.